• DocumentCode
    1677709
  • Title

    A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs

  • Author

    Di Carlo, S. ; Prinetto, Paolo ; Scionti, Alberto ; Figueras, Joan ; Manich, Salvador ; Rodriguez-Montañés, Rosa

  • Author_Institution
    Control & Comput. Eng. Dept., Politec. di Torino, Torino, Italy
  • fYear
    2009
  • Firstpage
    141
  • Lastpage
    146
  • Abstract
    The continues improvement of manufacturing technologies allows the realization of integrated circuits containing an ever increasing number of transistors. A major part of these devices is devoted to realize SRAM blocks. Test and diagnosis of SRAM circuits are therefore an important challenge for improving quality of next generation integrated circuits. This paper proposes a flexible platform for testing and diagnosis of SRAM circuits. The architecture is based on the use of a low cost FPGA based board allowing high diagnosability while keeping costs at a very low level.
  • Keywords
    SRAM chips; field programmable gate arrays; logic testing; SRAM circuit diagnosis architecture; low-cost FPGA-based testing; next-generation integrated circuits; Circuit faults; Circuit testing; Computer aided manufacturing; Costs; Fault diagnosis; Field programmable gate arrays; Integrated circuit testing; Microprocessors; SRAM chips; System testing; March Test; Memory Diagnosis; Memory Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advances in System Testing and Validation Lifecycle, 2009. VALID '09. First International Conference on
  • Conference_Location
    Porto
  • Print_ISBN
    978-1-4244-4862-3
  • Electronic_ISBN
    978-0-7695-3774-0
  • Type

    conf

  • DOI
    10.1109/VALID.2009.29
  • Filename
    5279391