Title :
A Low Power ASK Clock and Data Recovery Circuit for Wireless Implantable Electronics
Author :
Yu, Hong ; Bashirullah, Rizwan
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL
Abstract :
This paper describes a low power clock and data recovery (CDR) circuit with integrated ASK demodulator for wireless implantable neural recording microsystems. A modulation scheme based on amplitude shift-keying (ASK) and pulse position modulation (PPM) is employed to simplify the complexity of implant circuits and reduce power transmission requirements. A charge-pump based CDR circuit is used to extract non-return to zero data from the demodulated waveforms. A prototype has been fabricated in 2-poly 3-metal 0.6mum bulk CMOS technology in order to validate circuit functionality. The receiver front-end exhibits a sensitivity of 3.2mV p-p at 1MHz. The ASK demodulator and CDR operates over an input data range of 4kbs to 18kbs, measures 300pm by 600pm and dissipates 70pW from a 2.7V supply
Keywords :
amplitude shift keying; biomedical electronics; clocks; low-power electronics; neural nets; prosthetics; pulse position modulation; synchronisation; 0.6 micron; 1 MHz; 2-poly 3-metal bulk CMOS technology; 2.7 V; 3.2 mV; 300 pm; 4 to 18 kbits/s; 600 pm; 70 pW; amplitude shift-keying demodulator; charge-pump; circuit functionality validation; clock recovery circuit; data recovery circuit; implant circuits; power transmission requirements; pulse position modulation; receiver front-end; wireless implantable electronics; wireless implantable neural recording microsystems; Amplitude modulation; Amplitude shift keying; CD recording; CMOS technology; Clocks; Demodulation; Implants; Power transmission; Pulse circuits; Pulse modulation;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.321005
