Title :
On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS ICs
Author :
Ker, Ming-Dou ; Yen, Cheng-Cheng ; Shih, Pi-Chia
Author_Institution :
Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu
Abstract :
A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed in this paper. The circuit performance to detect different positive and negative fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.13-mum CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system-level ESD zapping. The proposed transient detection circuit can be further cooperated with power-on reset circuit to improve the immunity of CMOS IC products against system-level ESD stress
Keywords :
CMOS integrated circuits; detector circuits; electrostatic discharge; transients; 0.13 micron; CMOS IC; HSPICE simulator; fast electrical transients; on-chip transient detection circuit; system-level ESD protection; system-level ESD zapping; system-level electrostatic discharge protection; CMOS process; Circuit optimization; Circuit testing; Contacts; Electrostatic discharge; IEC standards; Immunity testing; Protection; System testing; System-on-a-chip;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.320949
