A Low-Jitter Added SSCG with Seamless Phase Selection and Fast AFC for 3rd Generation Serial-ATA

Author

Shin, Jongshin ; Seo, Ilwon ; Kim, JiYoung ; Yang, Seung-Hee ; Kim, Chiwon ; Pak, Jaehyun ; Kim, Hyungoo ; Kwak, Myoungbo ; Hong, GhyBoong

Author_Institution

Syst. LSI, Samsung Electron.

fYear

2006

Firstpage

409

Lastpage

412

Abstract

A low-jitter added 3GHz spread-spectrum clock generator (SSCG) with seamless phase selection and a fast automatic frequency calibration (AFC) was implemented in 90nm CMOS process. The proposed SSCG takes full advantage of multi-phase switching with increased sigma-delta operation speed. Large frequency shift and low jitter addition is obtained without extra phase management logic. A new AFC is also proposed for multi-band LC-VCO used in the SSCG. A fast and high resolution frequency calibration is done with direct counting of high frequency VCO clock. The experimental result shows that only 2.7ps peak-to-peak jitter is added by spread-spectrum clocking (SSC) and 400ns of unit frequency comparison time is achieved in AFC process

Keywords

CMOS integrated circuits; clocks; sigma-delta modulation; timing jitter; 2.7 ps; 3 GHz; 3rd generation serial-ATA; 400 ns; 90 nm; AFC; CMOS process; SSCG; automatic frequency calibration; extra phase management logic; frequency shift; low jitter; multi phase switching; seamless phase selection; sigma delta operation; spread-spectrum clock generator; Automatic frequency control; Calibration; Clocks; Delta-sigma modulation; Frequency modulation; Jitter; Phase frequency detector; Phase modulation; Spread spectrum communication; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Conference_Location

San Jose, CA

Print_ISBN

1-4244-0075-9

Electronic_ISBN

1-4244-0076-7

Type

conf

DOI

10.1109/CICC.2006.320969

Filename

4114991