Characterization of SiC PiN diode forward bias degradation

An automated test system is developed and utilized to electrically monitor the emitter, base, and end region excess carrier lifetimes at periodic intervals during the forward bias stress of SiC PiN power diodes. The test system uses a specialized diode switching circuit, computer-controlled instrumentation, and model parameter extraction software. This lifetime measurement method is used to monitor diodes with degradation times ranging from one minute to over several hundred hours, and diodes that do not degrade. Diodes made from 11-20 crystal orientation material are also measured to examine the effects of stacking fault growth direction. Light emission studies are used to monitor the growth of stacking faults during the degradation. The results indicate that stacking fault growth and on-state voltage degradation are strongly correlated with a decrease in diode stored charge density and stored charge decay rate resulting from a reduction in effective end region lifetime and/or reduction in device conduction area. Degradation results from various crystal orientation devices indicate that a barrier to current traversing the plane of the stacking fault is primarily responsible for the change in electrical properties.