Title :
A Calibration-Free 14b 70MS/s 3.3mm2 235mW 0.13um CMOS Pipeline ADC with High-Matching 3-D Symmetric Capacitors
Author :
Cho, Young-Jae ; Lee, Kyung-Hoon ; Choi, Hee-Cheol ; Lee, Seung-Hoon ; Moon, Kyoung-Ho ; Kim, Jae-Whui
Author_Institution :
Dept. of Electron. Eng., Sogang Univ., Seoul
Abstract :
A 14b 70MS/s 3-stage pipeline ADC in a 0.13mum CMOS process employs signal insensitive 3D fully symmetric capacitors for high matching accuracy without any calibration scheme. The prototype ADC with a 0.35mum minimum channel length for 2.5V system applications shows measured differential and integral nonlinearities of 0.65LSB and 1.80LSB at 14b, occupies a die area of 3.3mm2, and consumes 235mW at 70MS/s
Keywords :
CMOS integrated circuits; analogue-digital conversion; capacitors; integrated circuit design; 0.13 micron; 0.35 micron; 14 bit; 2.5 V; 235 mW; CMOS pipeline analog-to-digital converters; high-matching 3D symmetric capacitors; Calibration; Energy consumption; MIM capacitors; Metal-insulator structures; Parasitic capacitance; Pipelines; Sampling methods; Switches; Switching circuits; Wideband;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.320860
