Title :
Design For At-Speed Structural Test And Performance Verification Of High-Performance ASICs
Author :
Iyengar, Vikram ; Johnson, Mark ; Anemikos, Theo ; Grise, Gary ; Taylor, Mark ; Farmer, Rudy ; Woytowich, Frank ; Bassett, Bob
Author_Institution :
IBM Microelectron., Essex Junction, VT
Abstract :
Performance verification is critical to high-performance ASICs manufacturing. Performance verification ensures that only those chips whose performance is higher than an advertised threshold are shipped to demanding customers. This provides a means to weed out nominal performance ASICs, and also ship ASICs at difference grades. At-speed structural test can provide performance verification capability at very low cost. In this paper, we present a scalable and flexible structural test method for performance verification of ASICs. The proposed method requires no tight restrictions on the circuit design. Moreover, low-cost testers are used, thus sharply reducing test cost
Keywords :
application specific integrated circuits; integrated circuit manufacture; integrated circuit testing; at-speed structural test; high-performance ASIC; performance verification; Circuit faults; Circuit synthesis; Circuit testing; Clocks; Costs; Delay; Logic testing; Manufacturing; Marine vehicles; Timing;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.320991
