Thermal Annealing for Improving Gold Nano-particles Charge Trapping Layer Nonvolatile Memory Reliability Applications

Author

Hsin-Chiang You ; Yu-Hsien Lin ; Sheng-Jyun Wu

Author_Institution

Dept. of Electron. Eng., Nat. Chin-Yi Univ. of Technol., Taichung, Taiwan

fYear

2014

fDate

10-12 June 2014

Firstpage

458

Lastpage

461

Abstract

This work reports a versatile technique for enhancing charge storage nonvolatile memory device using a direct assembly of gold-Nanoparticles (AuNPs) as a charge trapping layer and zinc oxide (ZnO) as semiconductor layer. We have used two types of linker to deposit AuNPs, which are 3-aminopropyltrimethoxysilane (APTMS) and 3-mercaptopropyltriethoxysilane (MPTES) followed by gold colloidal. Atomic force microscopy (AFM) image showed the surface morphology of the well-separated immobilized AuNPs on a SiO₂/p-Si and the thermal annealing for improving nonvolatile memory has been research.

Keywords

III-V semiconductors; assembling; atomic force microscopy; colloids; gold; integrated circuit reliability; nanoparticles; random-access storage; wide band gap semiconductors; zinc compounds; 3-aminopropyltrimethoxysilane; 3-mercaptopropyltriethoxysilane; AFM image; APTMS; Au; MPTES; ZnO; atomic force microscopy; charge storage nonvolatile memory device; gold colloidal; gold nanoparticle charge trapping layer; gold-nanoparticle direct assembly; nonvolatile memory reliability; semiconductor layer; surface morphology; thermal annealing; well-separated immobilized AuNPs; Annealing; Flash memories; Gold; Temperature; Temperature measurement; Tunneling; Zinc oxide; Flash memory; Gold-nanoparticles; Linker; Memory Window; Reliability;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer, Consumer and Control (IS3C), 2014 International Symposium on

Conference_Location

Taichung

Type

conf

DOI

10.1109/IS3C.2014.126

Filename

6845918