Title :
An integrated mixed-mode neural network architecture for megasynapse ANNs
Author :
Schemmel, Johannes ; Shurmann, F. ; Hohmann, Steffen ; Meier, Karlheinz
Author_Institution :
Kirchhoff-Inst. for Phys., Heidelberg Univ., Germany
fDate :
6/24/1905 12:00:00 AM
Abstract :
This paper presents a new VLSI architecture for ANNs based on the combination of digital signalling and analog computing. It achieves a high level of parallelism as well as efficient area and power usage making very large networks possible. An implementation is presented combining 33k synapses and 256 neurons on 9 mm2 of silicon area
Keywords :
VLSI; analogue integrated circuits; digital signals; mixed analogue-digital integrated circuits; neural chips; neural net architecture; VLSI architecture; analog computing; digital signalling; integrated mixed-mode neural network architecture; megasynapse ANN; Artificial neural networks; Clocks; Computer architecture; Energy consumption; Frequency synchronization; Hardware; Neural networks; Neurons; Output feedback; Parallel processing;
Conference_Titel :
Neural Networks, 2002. IJCNN '02. Proceedings of the 2002 International Joint Conference on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-7278-6
DOI :
10.1109/IJCNN.2002.1007574
