• DocumentCode
    1680528
  • Title

    An integrated mixed-mode neural network architecture for megasynapse ANNs

  • Author

    Schemmel, Johannes ; Shurmann, F. ; Hohmann, Steffen ; Meier, Karlheinz

  • Author_Institution
    Kirchhoff-Inst. for Phys., Heidelberg Univ., Germany
  • Volume
    3
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Firstpage
    2704
  • Lastpage
    2709
  • Abstract
    This paper presents a new VLSI architecture for ANNs based on the combination of digital signalling and analog computing. It achieves a high level of parallelism as well as efficient area and power usage making very large networks possible. An implementation is presented combining 33k synapses and 256 neurons on 9 mm2 of silicon area
  • Keywords
    VLSI; analogue integrated circuits; digital signals; mixed analogue-digital integrated circuits; neural chips; neural net architecture; VLSI architecture; analog computing; digital signalling; integrated mixed-mode neural network architecture; megasynapse ANN; Artificial neural networks; Clocks; Computer architecture; Energy consumption; Frequency synchronization; Hardware; Neural networks; Neurons; Output feedback; Parallel processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 2002. IJCNN '02. Proceedings of the 2002 International Joint Conference on
  • Conference_Location
    Honolulu, HI
  • ISSN
    1098-7576
  • Print_ISBN
    0-7803-7278-6
  • Type

    conf

  • DOI
    10.1109/IJCNN.2002.1007574
  • Filename
    1007574
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1680528