• DocumentCode
    1681578
  • Title

    A Fully-Integrated 0.11μm CMOS Digital Low-IF DVB-S2 Satellite TV Dual Tuner SOC

  • Author

    Maxim, A. ; Poorfard, R. ; Johnson, R. ; Crawley, P. ; Kao, Jung-Chun ; Dong, Z. ; Chennam, M. ; Nutt, T. ; Trager, D.

  • Author_Institution
    Broadcast Div., Silicon Inc., Sunnyvale, CA
  • fYear
    2006
  • Firstpage
    809
  • Lastpage
    812
  • Abstract
    Notice of Violation of IEEE Publication Principles

    "A Fully-Integrated 0.11μm CMOS Digital Low-IF DVB-S2 Satellite TV Dual Tuner SOC"
    by Maxim, A.; Poorfard, R.; Johnson, R.; Crawley, P.; Kao, J.; Dong, Z.; Chennam, M.; Nutt, T.; Trager, D.
    in the Proceedings of the IEEE Custom Integrated Circuits Conference, Sept. 2006, pp 809-812

    After careful and considered review, it has been determined that the above paper is in violation of IEEE\´s Publication Principles.

    Specifically, the lead author admitted the paper contained falsified data. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:

    C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik

    Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.

    Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.

    Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references.A digital low-IF fully-integrated dual tuner for DVB-S2 satellite TV applications was realized in 0.11μm CMOS. It provides baseband digital I/Q outputs for a demodulator-on-host back-end processor. A wide bandwidth ring oscillator based frequency synthesizer having a large frequency step was used to down-convert a cluster of channels to a sliding low-IF frequency, while the second down-conversion to baseband was performed in the digital domain. The low-IF architecture allows a discrete AGC loop, while avoiding 1/f noise and DC offset i- sues. Eliminating the VCO tank inductors minimizes frequency pulling and parasitic coupling to front-end LNA, allowing the integration of a large digital core on the same die with the sensitive RF front-end.
  • Keywords
    1/f noise; CMOS digital integrated circuits; direct broadcasting by satellite; television broadcasting; television receivers; 0.11 micron; 1/f noise; CMOS digital; DC offset; DVB-S2; VCO tank inductors; demodulator on host back end processor; digital domain; dual tuner SOC; frequency pulling; frequency synthesizer; front end LNA; low-IF receiver; parasitic coupling; satellite TV; Application specific integrated circuits; Baseband; CMOS digital integrated circuits; Digital video broadcasting; Frequency synthesizers; IEEE publications; Satellite broadcasting; TV; Tuners; Writing; DVB-S2; low-IF receiver; satellite tuner;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    1-4244-0075-9
  • Type

    conf

  • DOI
    10.1109/CICC.2006.321011
  • Filename
    4115076