DocumentCode
1681753
Title
On-line error detecting constant delay adder
Author
Townsend, Whitney J. ; Abraham, Jacob A. ; Lala, Parag K.
Author_Institution
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
fYear
2003
Firstpage
17
Lastpage
22
Abstract
Fault tolerance requires the inclusion of redundant information. In this paper an on-line error detecting adder is presented in which the redundant information serves a dual purpose. It provides fault tolerance during the arithmetic operations while also providing a method by which addition is constrained to become a constant delay operation regardless of the word size of the operands.
Keywords
adders; decoding; digital arithmetic; encoding; error detection; fault tolerance; arithmetic operations; constant delay adder; fault tolerance; numerical encoding; on-line error detection; operand addition; optimized decoding method; optimized encoding method; redundant information; Added delay; Adders; Arithmetic; Circuit testing; Computer errors; Decoding; Encoding; Fault tolerance; Jacobian matrices; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE
Print_ISBN
0-7695-1968-7
Type
conf
DOI
10.1109/OLT.2003.1214361
Filename
1214361
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