DocumentCode
1681865
Title
An analog checker with input-relative tolerance for duplicate signals
Author
Stratigopoulos, Haralampos-G D. ; Makris, Yiorgos
Author_Institution
Electr. Eng. Dept., Yale Univ., New Haven, CT, USA
fYear
2003
Firstpage
54
Lastpage
58
Abstract
We discuss the design of a novel analog checker that monitors two duplicate signals and provides a digital error indication when their absolute difference is unacceptably large. The key feature of the proposed checker is that it establishes a test criterion that is dynamically adapted to the magnitude of its input signals. We demonstrate that, when this checker is utilized in concurrent error detection, the probability of both false negatives and false positives is diminished. In contrast, checkers implementing a static test criterion may only be tuned to achieve efficiently one of the aforementioned objectives. Likewise, when the proposed checker is employed for off-line test purposes, it results simultaneously in both high yield and high fault coverage.
Keywords
analogue circuits; circuit testing; error detection; signal processing; analog checker; concurrent error detection; digital error indication; duplicate signals; false negative signal; false positive signal; fault coverage; input-relative tolerance; off-line testing; static test criterion; yield; Automatic test equipment; Automatic testing; Circuit faults; Circuit testing; Design for testability; Filters; Particle measurements; Signal design; System testing; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE
Print_ISBN
0-7695-1968-7
Type
conf
DOI
10.1109/OLT.2003.1214367
Filename
1214367
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