• DocumentCode
    1682839
  • Title

    A software-hardware hybrid steering mechanism for clustered microarchitectures

  • Author

    Cai, Qiong ; Codina, Josep M. ; González, José ; González, Antonio

  • Author_Institution
    Intel- UPC, Intel Barcelona Res. Centers, Barcelona
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    12
  • Abstract
    Clustered microarchitectures provide a promising paradigm to solve or alleviate the problems of increasing microprocessor complexity and wire delays. High- performance out-of-order processors rely on hardware-only steering mechanisms to achieve balanced workload distribution among clusters. However, the additional steering logic results in a significant increase on complexity, which actually decreases the benefits of the clustered design. In this paper, we address this complexity issue and present a novel software-hardware hybrid steering mechanism for out-of-order processors. The proposed software- hardware cooperative scheme makes use of the concept of virtual clusters. Instructions are distributed to virtual clusters at compile time using static properties of the program such as data dependences. Then, at runtime, virtual clusters are mapped into physical clusters by considering workload information. Experiments using SPEC CPU2000 benchmarks show that our hybrid approach can achieve almost the same performance as a state-of-the-art hardware-only steering scheme, while requiring low hardware complexity. In addition, the proposed mechanism outperforms state-of-the-art software-only steering mechanisms by 5% and 10% on average for 2-cluster and 4-cluster machines, respectively.
  • Keywords
    circuit complexity; computer architecture; hardware-software codesign; logic design; microprocessor chips; program compilers; program diagnostics; SPEC CPU2000 benchmarks; cluster machines; clustered microarchitectures; hardware complexity; hardware-only steering mechanisms; microprocessor complexity; out-of-order processors; software- hardware cooperative scheme; software-hardware hybrid steering mechanism; static program property; steering logic; virtual clusters; wire delays; Clustering algorithms; Costs; Delay; Hardware; Microarchitecture; Microprocessors; Out of order; Processor scheduling; VLIW; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on
  • Conference_Location
    Miami, FL
  • ISSN
    1530-2075
  • Print_ISBN
    978-1-4244-1693-6
  • Electronic_ISBN
    1530-2075
  • Type

    conf

  • DOI
    10.1109/IPDPS.2008.4536229
  • Filename
    4536229