• DocumentCode
    1683986
  • Title

    Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology

  • Author

    Amara, Amara ; Gupta, Navneet ; Shaik, Khaja Ahmad ; Anghel, Costin ; Itoh, Kiyoo

  • Author_Institution
    Institut Supérieur d´Electronique de Paris (ISEP) 10 Rue Vanves, Issy-les-Moulineaux, France
  • fYear
    2015
  • Firstpage
    23
  • Lastpage
    23
  • Abstract
    The goal of this research work is to explore technology and memory architectures to reduce power consumption with low area and high speed of operation. We proposed two different architectures of SRAM memory. First is focused on reducing dynamic power consumption and area, with high speed of operation. Second architecture is focused on reducing leakage power with good speed and optimized area.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 22nd International Conference
  • Conference_Location
    Torun, Poland
  • Print_ISBN
    978-8-3635-7806-0
  • Type

    conf

  • DOI
    10.1109/MIXDES.2015.7208472
  • Filename
    7208472
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1683986