Automatic test generation for linear digital systems with bi-level search using matrix transform methods

A hierarchial testing approach for linear state variable digital systems based on matrix manipulation and constrained low-level test generation is reported. FEAST (functional extractor and sequential test generator) operates at the high level, where the circuit is described as an interconnection of arithmetic modules. CREST (constrained sequential test generator) operates at the low level description of the individual modules, and generates test sets satisfying constraints imposed by the high-level modules and their interconnection structure. The approach was found to perform better than automatic test generation at the gate level using existing algorithms for several large circuits.<>