IEC control specification to HDL synthesis: Considerations for implementing PLC on FPGA and scope for research

Today´s machine automation systems are demanding for better throughput, faster response, built in safety features and high speed communication support, besides satisfying IEC61131-3 control specification. MEMS sensors & actuators along with increased control logic complexities are stretching limits of conventional Programmable Logic controllers (PLCs) generally used for industrial and high end application control. This is because PLCs are implemented using sequential controllers. Throughput, response time, complex operation and flexible expansion in such case get limited due to typical fetch, decode and execute cycle. Field programmable Gate Arrays (FPGAs) which architecturally can satisfy these requirements, are proposed in the literature as prospective devices to implement PLCs. However, these devices have not been commonly accepted by control & automation industry. One of the important factors is difficulty in understanding FPGA design flow and its design specification standard. Currently, there is no proven interface available in the market to bridge between IEC control specification and FPGA design specification. Authors of this paper have thought over of developing such interface to open up benefits from VLSI design to control and automation domain. The issues and considerations for developing such interface are discussed in this paper. As this is multidisciplinary work, and not much work has been done in this area, possible research opportunities are discussed along with validation platform considerations.