DocumentCode :
1685083
Title :
Using constraint geometry to determine maximum rate pipeline clocking
Author :
Chang, C.-H. ; Davidson, E.S. ; Sakallah, K.A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear :
1992
Firstpage :
142
Lastpage :
148
Abstract :
Geometric knowledge of the shape of the feasible region formed by pulse width, setup, and hold constraints is used directly by an efficient (cubic complexity) algorithm, Gpipe, to determine the maximum rate for single-phase clocking of a given pipeline. The pipeline model uses level-sensitive latches as synchronizers and can allow wave pipelining. Gpipe is also used to explore the effect of removing nonsynchronizing and/or synchronizing latches on the maximum clock speed of the pipeline. A simple test shows which latches, if any, to remove in order to guarantee no decrease, and permit a possible increase, in the clock rate.<>
Keywords :
circuit CAD; clocks; computational complexity; constraint theory; geometry; optimisation; pipeline processing; redundancy; synchronisation; Gpipe; constraint geometry; cubic complexity; feasible region; hold constraints; level-sensitive latches; maximum clock speed; maximum rate pipeline clocking; nonsynchronizing latches; pulse width; redundant latches; setup constraints; single-phase clocking; synchronizers; synchronizing latches; wave pipelining; Clocks; Complexity theory; Design automation; Geometry; Optimization methods; Pipeline processing; Redundancy; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1992. ICCAD-92. Digest of Technical Papers., 1992 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-3010-8
Type :
conf
DOI :
10.1109/ICCAD.1992.279385
Filename :
279385
Link To Document :
بازگشت