DocumentCode :
1685517
Title :
Simulating asynchronous architectures on transputer networks
Author :
Theodoropoulos, G. ; Woods, J.V.
Author_Institution :
Dept. of Comput. Sci., Manchester Univ., UK
fYear :
1996
Firstpage :
274
Lastpage :
281
Abstract :
Recently, there has been a resurgence of interest in asynchronous design techniques due to the potential of asynchronous logic for higher performance, power efficiency and immunity from clock related timing problems. Occam, a CSP based parallel language provides for the rapid development of asynchronous architectural simulation models which may then be executed on a transputer network to achieve high performance. The paper discusses issues related to the design and execution of such models
Keywords :
Occam; asynchronous circuits; circuit analysis computing; logic design; parallel architectures; parallel languages; transputer systems; CSP based parallel language; Occam; asynchronous architectural simulation models; asynchronous architecture simulation; asynchronous design techniques; asynchronous logic; clock related timing problems; transputer networks; Clocks; Computational modeling; Computer architecture; Computer science; Debugging; Integrated circuit modeling; Logic design; Protocols; Synchronization; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing, 1996. PDP '96. Proceedings of the Fourth Euromicro Workshop on
Conference_Location :
Braga
Print_ISBN :
0-8186-7376-1
Type :
conf
DOI :
10.1109/EMPDP.1996.500597
Filename :
500597
Link To Document :
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