DocumentCode :
1685519
Title :
Overall consideration of scan design and test generation
Author :
Chen, P.-C. ; Liu, B.-D. ; Wang, J.-F.
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear :
1992
Firstpage :
9
Lastpage :
12
Abstract :
A complete system which takes the test generation algorithm, the scan cell selection strategy and the structure of the scan chain into account is proposed. It is totally different from the traditional approaches which try to enhance the ability of the individual subject. The goal of this research is to reduce the extra costs caused by the scan design, especially the test application time. Experimental results show that the overall consideration of scan design and test generation can speed up test generation and greatly reduce the amount of test application time.<>
Keywords :
design for testability; integrated circuit testing; logic CAD; logic testing; cost reduction; design for testability; scan cell selection strategy; scan chain structure; scan design; test application time; test generation algorithm; Design automation; Design for testability; Integrated circuit testing; Logic circuit testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1992. ICCAD-92. Digest of Technical Papers., 1992 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-3010-8
Type :
conf
DOI :
10.1109/ICCAD.1992.279407
Filename :
279407
Link To Document :
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