DocumentCode
1685765
Title
Fast and accurate fractional frequency synthesizer in 0.18μm technology
Author
Ghasemzadeh, Mehdi ; Soltani, Arefeh ; Akbari, Amin ; Hadidi, Khayrollah
Author_Institution
Microelectron. Res. Lab., Urmia Univ., Urmia, Iran
fYear
2015
Firstpage
330
Lastpage
333
Abstract
A 900MHz frequency synthesizer is presented in this article. The purpose of the proposed architecture is to minimize lock time in Phase-Locked Loops (PLLs). The structure has been simulated by HSPICE software in a typical 0.18um CMOS technology at the supply voltage of 1.8V. Simulation results prove that the designed frequency divider locks instantly that is a lower lock time compared to conventional PLLs.
Keywords
CMOS integrated circuits; frequency dividers; frequency synthesizers; phase locked loops; CMOS technology; HSPICE software; PLL; fractional frequency synthesizer; frequency 900 MHz; frequency divider; lock time; phase-locked loops; size 0.18 mum; voltage 1.8 V; Delays; Frequency control; Frequency conversion; Frequency synthesizers; Phase locked loops; Time-frequency analysis; Voltage-controlled oscillators; 5-bit control signal; Ring oscillator; frequency synthesizer;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 22nd International Conference
Conference_Location
Torun
Print_ISBN
978-8-3635-7806-0
Type
conf
DOI
10.1109/MIXDES.2015.7208537
Filename
7208537
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