Title :
Testing 256k word×16 bit Cache DRAM (CDRAM)
Author :
Konishi, Y. ; Ogawa, T. ; Kumanoya, M.
Author_Institution :
ULSI Lab., Japan
Abstract :
Cache DRAM (CDRAM) is a promising high speed memory which can eliminate “memory bottleneck” in a computer system and can realize “unified memory” for a multi-media system. Test of a CDRAM is broken down to several sub-test steps. Testing a CDRAM comprises separated test and concurrent test of SRAM and DRAM. Dual PGs of ATE are powerful tools both for high speed and concurrent operation tests
Keywords :
DRAM chips; automatic test equipment; automatic testing; cache storage; fault diagnosis; 16 bit; 256 kB; ATE; Cache DRAM; DRAM; SRAM; concurrent operation test; concurrent test; high speed memory; high speed test; memory bottleneck; multimedia system; unified memory; Automatic testing; Clocks; Computer buffers; Laboratories; Multimedia systems; Neck; Pins; Random access memory; Signal generators; Test pattern generators;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.527970
