Title :
Developing Improved IO Buffer Behavioral Modeling Methodology Based on IBIS
Author :
Varma, Ambrish ; Steer, Michael ; Franzon, Paul
Author_Institution :
NCSU, Raleigh, NC
Abstract :
A new macromodeling methodology based on IBIS (input/output buffer information specification) models is proposed. IBIS models are known to lack information regarding power and ground bounce (Varma, et. al., 2004 and Yang, et. al., 2005) resulting in incorrect system level simulations. The new macromodel works with available simulators and produces models that can be simulated accurately for simultaneous switching noise (SSN). To demonstrate the solution, a CMOS voltage-mode driver circuit and a MICRON DDR2 driver are simulated using HSPICE and compared with equivalent circuits created with IBIS models of the same drivers
Keywords :
CMOS integrated circuits; SPICE; buffer circuits; circuit simulation; driver circuits; equivalent circuits; integrated circuit modelling; CMOS voltage mode driver circuit; HSPICE; IBIS; IO buffer; MICRON DDR2 driver; behavioral modeling; equivalent circuits; input/output buffer information specification; macromodeling; switching noise; Bit error rate; Circuit noise; Circuit simulation; Driver circuits; Pins; Power system modeling; Rails; Semiconductor device modeling; Signal to noise ratio; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0668-4
DOI :
10.1109/EPEP.2006.321193
