ASIC implementation of an auto ranging data converter

High performance and high speed data converter systems are needed for biomedical fields. Area, power dissipation and speed are the most important factors when it comes to implementation of such systems in VLSI domain. The project proposes implementation an auto ranging analog to digital converter for biomedical applications as an ASIC. The system outputs 24 bits and features a sigma delta ADC of 16 bits resolution, a range detection unit with 7 bits and a sign bit for polarity detection. The analog part of the modulator is a second order sigma delta modulator operating at audio frequency ranges. The digital section of sigma delta ADC containing the decimation filter banks is done in a cascaded filter structure form including a CIC decimation filter, droop compensation and half-band filters. The Analog modulator simulation is being done using spice. The top level module was coded using VHDL and the simulation was carried out with ModelSim and MATLAB.