Systematic derivation of symbol-rate timing-error detectors

Timing synchronizers which operate at symbol-rate can be systematically generated with a new method described in this paper. The new timing-error detectors can be optimized for particular applications, e.g. DSL transceivers. Based on the fundamental structure of symbol-rate decision-directed timing-error detectors, the timing function of the synchronizer as well as the jitter in the timing loop are described as functions of the synchronizer implementation, channel characteristics and noise scenario. New timing-error detectors are derived by minimizing the jitter under the constraint that the timing function has the properties required for the control loop. For the particular application of DSL transceivers, it is shown that the tracking-mode performance of these timing synchronizers is better than the performance of widely-used symbol-rate synchronizers commonly discussed in the literature.