Title :
A study of IDDQ subset selection algorithms for bridging faults
Author :
Chakravarty, Sreejit ; Thadikaran, Paul
Author_Institution :
Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
Abstract :
Selecting a small subset of the set of functional vectors for performing IDDQ measurement has previously been studied for leakage but not for bridging faults. Algorithms for this problem for all two line bridging faults, in combinational and sequential circuits, along with experimental results are presented
Keywords :
CMOS logic circuits; automatic testing; combinational circuits; electric current measurement; fault diagnosis; logic testing; sequential circuits; IDDQ subset selection algorithms; QUIETEST; SETCOVER; bridging faults; combinational circuits; functional vectors; leakage; sequential circuits; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Sequential circuits; Velocity measurement;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.527982
