DocumentCode :
1690297
Title :
A design flow tailored for self dynamic reconfigurable architecture
Author :
Cancare, Fabio ; Santambrogio, Marco D. ; Sciuto, Donatella
Author_Institution :
Dipt. di Elettron. e Inf., Politec. di Milano, Milan
fYear :
2008
Firstpage :
1
Lastpage :
8
Abstract :
Dynamic reconfigurable embedded systems are gathering, day after day, an increasing interest from both the scientific and the industrial world. The need of a comprehensive tool which can guide designers through the whole implementation process is becoming stronger. In this paper the authors introduce a new design framework which amends this lack. In particular the paper describes the entire low level design flow onto which the framework is based.
Keywords :
embedded systems; software architecture; dynamic reconfigurable embedded systems; low level design flow; self dynamic reconfigurable architecture; Application software; Coprocessors; Embedded system; Engines; Field programmable gate arrays; Hardware; High performance computing; Reconfigurable architectures; Runtime; Software architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on
Conference_Location :
Miami, FL
ISSN :
1530-2075
Print_ISBN :
978-1-4244-1693-6
Electronic_ISBN :
1530-2075
Type :
conf
DOI :
10.1109/IPDPS.2008.4536526
Filename :
4536526
Link To Document :
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