Implementation of fully isolated Low Vgs nLDMOS with low specific on-resistance

Author

Ko, Choul-Joo ; Cho, Cheol-Ho ; Kim, Min-Seok ; Jung, Hyung-Gyun ; Lee, Hee-Bae ; Lee, Yong-Jun ; Kim, Min-Woo ; Gu, Sung-Mo ; Bang, Sun-Kyung ; Kim, Han-Geon ; Kang, Sun-Kyoung ; Yoo, Kwang-Dong ; Hutter, Lou

Author_Institution

Analog Foundry Bus. Unit, Dongbu Hitek, Bucheon, South Korea

fYear

2011

Firstpage

24

Lastpage

27

Abstract

In this paper, we present a new isolated Low Vgs NLDMOS in 0.35um BCDMOS process. The proposed LDMOS is fully isolated from substrate and has very lower Rsp(specific on-resistance) than other competitors. This device can apply a negative bias to drain and it can be used in AMOLED application. The proposed LDMOS devices in 30-40V ranges have the lowest Rsp with other competitors in 0.13-0.35um BCDMOS technologies. And the Rsp of the proposed LDMOS in 40V range is 46.3% lower than Low Vgs LDMOS last reported. And the isolation efficiency of the proposed LDMOS has very good performance. Furthermore, a logic CMOS and all the other components are compatible in the proposed process.

Keywords

CMOS integrated circuits; AMOLED application; BCDMOS process; BCDMOS technology; LDMOS device; NLDMOS; complementary metal-oxide-semiconductor integrated circuits; low specific on-resistance; size 0.13 mum to 0.35 mum; voltage 30 V to 40 V; Active matrix organic light emitting diodes; Electric breakdown; Electric potential; Impact ionization; Integrated circuits; Logic gates; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs (ISPSD), 2011 IEEE 23rd International Symposium on

Conference_Location

San Diego, CA

ISSN

1943-653X

Print_ISBN

978-1-4244-8425-6

Type

conf

DOI

10.1109/ISPSD.2011.5890781

Filename

5890781