Title :
600V LPT-CSTBT™ on advanced thin wafer technology
Author :
Haraguchi, Yuki ; Honda, Shigeto ; Nakata, Kazunari ; Narazaki, Atsushi ; Terasaki, Yoshiaki
Author_Institution :
Power Semicond. Device Dev. Dept., Mitsubishi Electr. Corp., Kumamoto, Japan
Abstract :
Electrical characteristics of the fabricated 600V class CSTBT™ with a Light Punch Through (LPT) structure on an advanced thin wafer technology are presented for the first time. The electrical characteristics of LPT-CSTBT are superior to the conventional Punch Through type (PT) one, especially in low current density regions because of the inherent lower built-in potential. Furthermore, we also have evaluated the effects of the mechanical stress on the device characteristics after soldering, utilizing a novel evaluation method with a very small size sub-chip layout. The results validate the proposed tool is useful to examine the influence of the mechanical stress on the electrical characteristics.
Keywords :
circuit layout; circuit optimisation; insulated gate bipolar transistors; soldering; IGBT; LPT-CSTBT; advanced thin wafer technology; electrical characteristics; light punch through structure; low current density regions; mechanical stress; soldering; sub-chip layout; voltage 600 V; Current density; Electric variables; Insulated gate bipolar transistors; Logic gates; Semiconductor device measurement; Soldering; Stress;
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2011 IEEE 23rd International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-8425-6
DOI :
10.1109/ISPSD.2011.5890792
