Title :
CMOS adder and shift register layout generators
Author :
Solana, J.I. ; Santos, A. ; López, J.C. ; López, C.
Author_Institution :
Dipartimento Ingenieria Electron., Univ. Politecnia de Madrid, Spain
Abstract :
A module generator that can customize adders, adder-subtracters, and shift registers is presented. It offers the user several design options and estimates the area and delays of the circuit to the obtained. Its output is the full layout of the circuit, and it can be integrated with other tools to obtain an automatic design environment. An estimate of the area and speed of the circuit is given so that the user may select the best solution among the different structures proposed
Keywords :
CMOS integrated circuits; VLSI; adders; circuit layout CAD; integrated logic circuits; logic CAD; shift registers; CMOS; adder; area; circuit layout CAD; delays; layout generators; module generator; shift register; Adders; CMOS technology; Circuit simulation; Delay estimation; Integrated circuit technology; Process design; SPICE; Shift registers; Software packages; Very large scale integration;
Conference_Titel :
Electrotechnical Conference, 1989. Proceedings. 'Integrating Research, Industry and Education in Energy and Communication Engineering', MELECON '89., Mediterranean
Conference_Location :
Lisbon
DOI :
10.1109/MELCON.1989.50082
