DocumentCode :
1691605
Title :
Reducing power consumption in FFT architectures by using heuristic-based algorithms for the ordering of the twiddle factors
Author :
Luz, Angelo Gonçalves da ; Costa, Eduardo A C da ; Ghissoni, Sidinei
Author_Institution :
SENAC, Pelotas, Brazil
fYear :
2012
Firstpage :
1
Lastpage :
4
Abstract :
This paper addresses the exploration of different heuristic-based algorithms for a better manipulation of coefficients in Fast Fourier Transform (FFT). Due to the characteristics of the FFT algorithms, which involve multiplications of input data with appropriate coefficients, the best ordering of these operations can contribute for the reduction of the switching activity, what leads to the minimization of power consumption in the FFTs. The heuristic-based algorithm named Bellmore and Nemhauser and a new proposed one named Anedma are used to get as near as possible to the optimal solution for the ordering of coefficients in FFTs with larger number of points. As will be shown, the appropriate ordering of coefficients, based on the guidance given by the Anedma heuristic algorithm, can contribute for the reduction of power consumption of the FFT architectures.
Keywords :
fast Fourier transforms; power consumption; power supply circuits; Anedma heuristic algorithm; FFT algorithm; FFT architectures; fast Fourier transform; heuristic-based algorithm; power consumption reduction; twiddle factors; Algorithm design and analysis; Computer architecture; Finite impulse response filter; Hamming distance; Heuristic algorithms; Partitioning algorithms; Power demand;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (LASCAS), 2012 IEEE Third Latin American Symposium on
Conference_Location :
Playa del Carmen
Print_ISBN :
978-1-4673-1207-3
Type :
conf
DOI :
10.1109/LASCAS.2012.6180313
Filename :
6180313
Link To Document :
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