A High-Level Language and Compiler to Configure the Multi-core Debug Solution (MCDS)

With the rise of multi-core system-on-chips (SoC) debug adds new requirements and challenges to the system visibility and control. Complex on-chip trace and debug hardware like Infineon´s multi-core debug solution (MCDS) offer the benefit of high degree of observability without affecting the run-time behavior of the system. Highly sophisticated programmable trace qualification capabilities allow the definition of analysis tasks, tailored to the users´ needs. This paper introduces a high-level trace qualification language and compiler which enables the user defining analysis tasks efficiently and fully utilize the powerful and complex features of MCDS without the need of getting into the internals. The language and the compiler are already in industrial use where software development is based on MCDS enabled SoCs to support the developers to achieve better product quality and shorter product development cicles.