VLSI implementation of single bit control system processor with efficient code density

This paper describes a novel single bit control system processor with efficient code density in System onChip(SOC) and mixed signal applications. Advanced process technology nowadays enables hundreds of million transistors to be integrated onto a single chip, making system-on-a-chip designs more feasible than ever. Such SOC chips usually consist of various components such as analog-to-digital (ADCs) and digital-to-analog (DACs) converters, Phase locked loops (PLLs), random logic, memory, processors, and so on. Delta-Sigma (ΔΣ) modulator is frequently used in the Conversion of signals from analog or digital form into bit streams at very high sampling rate. Single Bit control system processor that uses this modulation technique is a small and fast application-specific processor in SOC and mixed signal applications. Another increasing concern in processor design is improved Code density, since it reduces the need for the scarce resource memory and also implicitly improves further important design Parameters like power consumption and performance. A dictionary based data compression technique which provides a substantial improvement in the compression efficiency without introducing any additional decompression penalty is introduced here. This may also reduce the power Consumption, since memory consumes a significant amount of Control system processor´s power.