Title :
Modeling of nonideal return paths on multilayer package
Author_Institution :
R&D Div., Siliconware Precision Industries Co. Ltd., Tantzu, Taiwan
fDate :
6/24/1905 12:00:00 AM
Abstract :
Nonideal current return paths should always be prohibited for high-speed digital system design. However, split ground planes are not avoidable for high density interconnects. The purpose of this paper was to characterize the signal traces crossing different types of ground slot on the multilayer package using the 3D full-wave simulator. Results indicated that the signal traces crossing the ground slot were characterized with larger inductance, capacitance, and mutual capacitance. Shorter ground slot, reduced trace capacitance, or without ground guards surrounding the signal traces are recommended to minimize the return loss when signal traces crossing the ground slot is necessary.
Keywords :
ball grid arrays; capacitance; circuit simulation; digital integrated circuits; high-speed integrated circuits; inductance; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; losses; multichip modules; plastic packaging; 3D full-wave simulator; MCBGA; PBGA; ground guards; ground slot; high density interconnects; high-speed digital system design; inductance; multi-chip ball grid array; multilayer package; mutual capacitance; nonideal current return paths; nonideal return path modeling; plastic ball grid array; return loss; signal traces; split ground planes; Capacitance; Electronic packaging thermal management; Electronics packaging; Finite difference methods; Inductance; Insertion loss; Integrated circuit interconnections; Nonhomogeneous media; Scattering parameters; Time domain analysis;
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
Print_ISBN :
0-7803-7430-4
DOI :
10.1109/ECTC.2002.1008073
