Title :
ΣΔ Modulator with op-amp gain compensation for nanometer CMOS technologies
Author :
Perez, Aldo Peña ; Gonzalez-Diaz, Victor R. ; Maloberti, Franco
Author_Institution :
Dept. of Electron., Univ. of Pavia, Pavia, Italy
Abstract :
A gain compensated op-amp for discrete-time ΣΔ modulators is described. The method greatly reduces the integrator´s phase error caused by low DC gain on amplifiers. The scheme uses an additional unity gain buffer to correct the error caused by gains as low as 20 dB, thus enabling high-performance ΣΔ modulators in nanometer-scale CMOS technologies. Design strategies for op-amps and buffer designed with a 65 nm technology to be used with the method are considered. The effectiveness of the approach is verified with a second-order ΣΔ modulator simulated at behavioral level with MATLAB and Verilog-A descriptions. The low sensitivity to buffer gain´s variations is also verified.
Keywords :
CMOS integrated circuits; operational amplifiers; sigma-delta modulation; MATLAB; Verilog-A description; behavioral level; compensated op-amp; discrete-time sigma-delta modulators; high-performance sigma-delta modulators; nanometer CMOS technology; nanometer-scale CMOS technology; op-amp gain compensation; Application software; Bandwidth; Clocks; Gain; Modulation; Signal to noise ratio; Simulation; Amplifiers; compensation; operational amplifiers;
Conference_Titel :
Circuits and Systems (LASCAS), 2012 IEEE Third Latin American Symposium on
Conference_Location :
Playa del Carmen
Print_ISBN :
978-1-4673-1207-3
DOI :
10.1109/LASCAS.2012.6180348
