• DocumentCode
    1692758
  • Title

    A new high density organic laminate for high pin-count flip chip packages

  • Author

    Takami, Seiichi ; Hori, Masaaki ; Arikawa, Masuhiro ; Matsuoka, Takahiro ; Hiramatsu, Yukihiro ; Iwata, Yasutoshi ; Hotehama, Masaharu ; Hayashi, Katsura

  • Author_Institution
    Kyocera Corp., Kagoshima, Japan
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Firstpage
    119
  • Lastpage
    123
  • Abstract
    By applying ´simultaneous curing´ substrates for core substrates, we developed an ultra high transmission speed build up substrate (called Super HDBU®) which is applicable for flip chip packages with over 3,000 I/O. Most build up interconnected substrates have been using a PWB with plated through holes (PTH) as the core substrate. Considering the form density of interconnects and transmission speed, this core with PTH has become a barrier by dividing the top and bottom surface of the substrate. Also, design interconnection lines are limited to the top side of the build up substrate which mounts the LSI devices. As for the solution to these issues, we have developed a new process of simultaneous curing with a copper foil transfer method onto an uncured prepreg. The simultaneous curing substrate method makes it possible to design signal interconnection lines on build up layers on both the top and bottom surfaces of the core substrate. In addition, it provides much finer via and narrower via pitch design on the core substrate which enables full grid area design instead of peripheral design.
  • Keywords
    chip scale packaging; flip-chip devices; hot pressing; integrated circuit interconnections; laminates; microassembling; substrates; Cu; LSI device mounting; PTH; PWB; Super HDBU; build layers; build-up interconnected substrates; copper foil transfer method; core substrates; flip chip package I/O; full grid area design; high density organic laminates; high pin-count flip chip packages; interconnect form density; peripheral interconnect design; plating through holes; signal interconnection lines; simultaneous curing substrate method; substrate bottom surface; substrate top surface; substrate transmission speed; ultra high transmission speed build up substrate; uncured prepreg; via pitch; via size; Copper; Curing; Dielectric substrates; Flip chip; Frequency; Laminates; Large scale integration; Packaging; Signal design; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2002. Proceedings. 52nd
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7430-4
  • Type

    conf

  • DOI
    10.1109/ECTC.2002.1008083
  • Filename
    1008083