A software tool for technology tradeoff evaluation in multichip packaging

Author

Sandborn, Peter A.

Author_Institution

Microelectronics & Computer Technology Corp., Austin, TX, USA

fYear

1991

Firstpage

337

Lastpage

341

Abstract

A software tool for evaluating performance tradeoffs in multichip packaging is described. The tool enhances the manufacturability and decreases the design risk associated with the selection of packaging technologies for integrated circuits. Geometric, electrical, thermal, and manufacturing metrics can be estimated using the tool. The tool allows technologies to be changed and design rules to be modified using a what if approach. The role of technology tradeoff analysis in multichip system design and system compiler concepts are discussed, and implementation details of the present tool are described. A design example of a RISC processor module is presented, and the use of the tool for assessing mixed technology systems is demonstrated

Keywords

electronic engineering computing; integrated circuit technology; modules; packaging; MCM; RISC processor module; integrated circuits; manufacturability; mixed technology systems; multichip packaging; performance tradeoffs; software tool; system compiler; technology tradeoff evaluation; Appropriate technology; Design automation; Design methodology; Integrated circuit packaging; Integrated circuit technology; Manufacturing; Performance loss; Software packages; Software tools; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-0155-2

Type

conf

DOI

10.1109/IEMT.1991.279809

Filename

279809