Data-aided ML parameter estimators for PSK burst modems and their systolic VLSI implementations

A high performance Universal Modem ASIC that supports several modulation types and burst mode frame formats is under development. Powerful and generic data-aided (DA) parameter estimators are necessary to accommodate many modes. In this paper we present an approximated maximum likelihood (ML) carrier frequency offset estimator, ML joint carrier phase and timing offsets estimator and their systolic VLSI implementations for PSK burst modems. The performances are close to the Cramer-Rao lower bounds (CRLB) at low SNRs. Compared with theoretical solutions the estimators proposed here are much simpler and easier to implement by the current VLSI technology. The CRLB for DA estimations is discussed in some depth, some issues on training sequence design is also addressed in this work