DocumentCode :
1693356
Title :
Calculation of shape and experimental creation of AuSn solder bumps for flip chip applications
Author :
Hutter, M. ; Oppermann, H. ; Engelmann, G. ; Wolf, J. ; Ehrmann, O. ; Aschenbrenner, R. ; Reichl, H.
Author_Institution :
Fraunhofer Inst. for Reliability & Microintegration, Berlin, Germany
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
282
Lastpage :
288
Abstract :
Eutectic Au/Sn 80/20 solder is used more and more for flip chip assembly especially of optoelectronic devices because no flux is necessary during soldering. Galvanic deposited AuSn bumps are created on wafer scale and therefore are of interest in terms of costs. The creation of electroplated AuSn bumps comprises the galvanic deposition of Au and Sn in successive steps followed by a reflow in liquid medium which is necessary to form the eutectic solder cap on top of the bumps. Depending on the application the pitch and the height, diameter and shape of the bumps have to be chosen. The shape of the bump (i.e. the height of the total bump and the thickness of the eutectic cap as well as the height of the remaining Au socket beneath the eutectic solder cap) can be adjusted by calculating the heights of the Au and Sn layers that are deposited. The remaining Au socket absorbs emerging stresses during soldering and during thermal cycling. The bumps´ shape is calculated prior to the experimental setup. The bumps are created experimentally by means of electroplating and reflow in liquid medium and are analyzed using cross sections and SEM. Different bump diameters and thicknesses of the Sn cap are used. The microstructure of the eutectic solder cap, the shape of both the solder cap and the remaining Au socket as well as the formation of intermetallic phases are investigated and discussed.
Keywords :
ageing; electroplated coatings; electroplating; flip-chip devices; gold alloys; microassembling; optoelectronic devices; reflow soldering; scanning electron microscopy; tin alloys; Au; Au socket; AuSn solder bumps; SEM; Sn cap; Sn-AuSn; aging; bump diameters; bump shape; bump thicknesses; electroplated AuSn bumps; eutectic Au/Sn 80/20 solder; eutectic solder cap; flip chip assembly; galvanic deposited bumps; intermetallic phases formation; microstructure; optoelectronic devices; reflow; Assembly; Flip chip; Galvanizing; Gold; Optoelectronic devices; Shape; Sockets; Soldering; Thermal stresses; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
ISSN :
0569-5503
Print_ISBN :
0-7803-7430-4
Type :
conf
DOI :
10.1109/ECTC.2002.1008108
Filename :
1008108
Link To Document :
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