Title :
Testability challenges to achieve zero defect goal in MCM manufacturing
Author :
McQueeney, David F. ; Zittritsch, Terry J.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
Discusses some approaches to chip test and MCM (multi-chip module) assembly, and describes a module designed for CMOS logic, including details of its chip attach technology, test, and burn-in strategy. It is concluded that test procedures can be more easily implemented if the chips are designed for an MCM environment. Two significant challenges are the use on an MCM of chips whose design did not consider MCM test issues, and modules made up of chips from different manufacturers
Keywords :
hybrid integrated circuits; integrated circuit manufacture; integrated circuit testing; integrated logic circuits; production testing; CMOS logic; MCM environment; MCM manufacturing; burn-in strategy; chip attach technology; chip test; multi-chip module; test procedures; zero defect goal; Assembly; Bonding; CMOS logic circuits; CMOS process; CMOS technology; Cost function; Logic testing; Manufacturing; Microprocessors; Packaging;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-0155-2
DOI :
10.1109/IEMT.1991.279827
