DocumentCode :
1694162
Title :
An architecture of Delta-Sigma A-to-D converters using a voltage controlled oscillator as a multi-bit quantizer
Author :
Iwata, Atsushi ; Sakimura, Noboru ; Nagata, Makoto ; Morie, Takashi
Author_Institution :
Fac. of Electr. Eng., Hiroshima Univ., Japan
Volume :
1
fYear :
1998
Firstpage :
389
Abstract :
This paper proposes a new architecture for an oversampling Delta-Sigma Analog-to-Digital converter utilizing a voltage controlled oscillator (VCO), called a VCO DS A-to-D converter. The converter consists of a VCO, a counter, an analog integrator, and a feedback D-to-A converter. Through functional and circuit simulations, an SNR of over 50 dB was obtained at a 5 MHz signal bandwidth and 400 MHz sampling frequency using 0.6 μm CMOS technology. This architecture is highly suitable for implementation with deep sub-μm CMOS devices that can attain improved switching speeds and reduce power dissipation during low voltage operation. It provides wideband oversampling A-to-D converters for video and wireless signals and a low voltage system-on-a-chip solution for multi-media applications
Keywords :
CMOS integrated circuits; quantisation (signal); sigma-delta modulation; voltage-controlled oscillators; 0.6 micron; 400 MHz; 5 MHz; SNR; architecture; circuit simulation; deep submicron CMOS device; low voltage system-on-a-chip; multi-bit quantizer; multimedia application; oversampling delta-sigma analog-to-digital converter; power dissipation; switching speed; video signal; voltage controlled oscillator; wireless signal; Analog-digital conversion; Bandwidth; CMOS technology; Circuit simulation; Counting circuits; Feedback; Frequency; Low voltage; Sampling methods; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
Type :
conf
DOI :
10.1109/ISCAS.1998.704448
Filename :
704448
Link To Document :
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