DocumentCode :
1694866
Title :
Advanced packaging for GHz switching applications
Author :
Wang, Minchuan ; Langari, Abdolreza ; Hashemi, Hassan
Author_Institution :
Mindspeed Technol., Newport Beach, CA, USA
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
634
Lastpage :
640
Abstract :
We have developed a package technology platform based on solder flip chip on glass ceramic that satisfies high speed, high pin count, high power dissipation requirements for OC-48 and OC-192 switching and processing applications. We review the design features of a ceramic flip chip ball grid array (CBGA) package housing a large CMOS die with over 2000 bumps, and over 300 high bandwidth differential pair transmission lines. The package incorporates 50 Ω odd-mode impedance transmission lines to accommodate broadband data transmission at OC-48 data rates while providing great channel to channel isolation to reduce jitter. The package and IC are co-designed to allow very clean power supply delivery of several tens of amps of current while minimizing the impact of flip chip pad coupling to underlying analog and RF circuits. The package lid configuration is designed to provide good thermal performance while providing reliability margins for first and second level solder joint reliability. Actual device performance shows excellent eye-diagram at OC-48 data rate. Further electrical characterization shows even at OC-192 (10 Gbps) data rate, the package interconnect contributes less than 1 ps/mm rise time degradation and peak to peak jitter generation of 0.12 ps/mm. The combination of good attributes in terms of electrical performance, routing density, thermal performance and reliability makes this packaging platform superior to organic alternatives.
Keywords :
CMOS digital integrated circuits; ball grid arrays; ceramic packaging; chip scale packaging; flip-chip devices; high-frequency transmission lines; integrated circuit bonding; integrated circuit design; integrated circuit interconnections; integrated circuit measurement; jitter; very high speed integrated circuits; 10 Gbit/s; 50 ohm; CBGA; CMOS IC; GHz switching applications; IC electrical performance; IC-package co-design; OC-192 switching; OC-48 switching data rates; broadband data transmission; ceramic flip chip ball grid array; channel to channel isolation; device performance; eye-diagram; flip chip pad coupling; high bandwidth differential pair transmission lines; high pin count package; high power dissipation; high speed package; jitter reduction; odd-mode impedance transmission lines; package bump number; package interconnects; package lid configuration; package routing density; package thermal performance; peak to peak jitter generation; power supply current; power supply quality; processing applications; signal rise time degradation; solder flip chip on glass ceramic package technology; solder joint reliability; Bandwidth; CMOS technology; Ceramics; Electronics packaging; Flip chip; Glass; Impedance; Jitter; Power dissipation; Power transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
ISSN :
0569-5503
Print_ISBN :
0-7803-7430-4
Type :
conf
DOI :
10.1109/ECTC.2002.1008162
Filename :
1008162
Link To Document :
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