Title :
A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications
Author :
Taki, Daisuke ; Shiozawa, Tatsuo ; Ito, Kuniaki ; Shiba, Youichiro ; Horisaki, Kouji ; Kajihara, Hirotsugu ; Yamagishi, Toshiyuki ; Sekiya, Masahiro ; Yamaga, Akira ; Fujita, Tetsuya ; Hara, Hiroyuki ; Kuwahara, Masanori ; Fujisawa, Toshio ; Unekawa, Yasu
Author_Institution :
Toshiba Corp. Semicond. Co., Kawasaki, Japan
Abstract :
Low power IEEE 802.11n single input single output (SISO) wireless LAN (WLAN) baseband LSI has been developed for mobile applications. The multiple low power technologies such as on-chip power gating and high throughput technologies for expanding idle time are applied to the LSI. By minimizing always-on circuits and implementing them using thick gate-oxide transistors, 7uW stand-by power consumption is achieved with negligible shutdown/restart transition time. The built-in wake-up timer and on-chip CPU enables continuous transmit/receive operation without an external intervention.
Keywords :
large scale integration; low-power electronics; mobile radio; radiofrequency integrated circuits; wireless LAN; IEEE 802.11n single input single output wireless LAN; built-in wake-up timer; deep-sleep ultra low-power WLAN baseband LSI; high throughput technology; mobile applications; on-chip CPU; on-chip power gating; power 7 muW; stand-by power consumption; Large scale integration; Logic gates; Phasor measurement units; Power demand; System-on-a-chip; Throughput; Wireless LAN; IEEE802.11n; baseband LSI; low power; mobile application; on-chip regulator; power gating; wireless LAN;
Conference_Titel :
Cool Chips XIV, 2011 IEEE
Conference_Location :
Yokohama
Print_ISBN :
978-1-61284-883-9
Electronic_ISBN :
978-1-61284-882-2
DOI :
10.1109/COOLCHIPS.2011.5890931
