Tutorial

This tutorial is aimed at the system engineer, who has to deal with DRAMs in an application. DRAMS come in densities from 512 MBit to 4 GBit, operating voltage ranges between 1.35 V and 2.5 V, as components and modules with 4..64 data lines and have a leaky capacitor for storage. The memory interface has data rates from 233 MBit/s/pin up to 2 GBit/s/pin. Fundamentals of memories are covered. Theory as well as practical, industrial examples will be discussed. Resources like data sheets to learn more about memories will be presented. Understanding of operational states for initialization, write, read and refresh during this class enables the audience to optimize the use of memories in a system. The class enables the audience to develop typical memory patterns. Typical failure modes in the array and periphery are presented to show how to use different debugging and diagnosis tools to find the root cause. This can help in enabling using a DRAM in an application. The benefits of compressed and full bitfailmaps will be presented. High speed operation of modern memory interfaces is discussed. Strategies for systematic measurements of the data eye and limitations of the measurement equipment will be shown.