Title :
A 12-b, 100 ns/b, 1.9 mW switched-current cyclic A/D converter
Author :
Wang, Jin-Sheng ; Wey, Chin-Long
Author_Institution :
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
Abstract :
This paper presents a high-speed, high-resolution, and low-power CMOS switched-current cyclic Analog-to-Digital Converter (ADC). The high performance is attributed to the use of the following components: (1) a high-performance residual amplifier which takes two clock cycles to double a current; and (2) an efficient cyclic RSD algorithm which provides 1.5 b resolution without using two matched reference currents. Simulation results show that the developed ADC achieves 12-bit resolution, a conversion rate of 100 ns per bit, and a power consumption of 1.9 mW, where the low-cost MOSIS SCAN20 2 μm CMOS process and 3.3 V supply voltage are employed
Keywords :
CMOS integrated circuits; analogue-digital conversion; switched current circuits; 1.9 mW; 12 bit; 2 micron; 3.3 V; SI cyclic A/D converter; cyclic RSD algorithm; high-performance residual amplifier; high-resolution type; high-speed operation; low-cost MOSIS SCAN20 CMOS process; low-power CMOS ADC; switched-current cyclic ADC; Analog circuits; Analog-digital conversion; CMOS process; CMOS technology; Circuit simulation; Signal processing; Signal processing algorithms; Switching circuits; Switching converters; Voltage;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704465
