• DocumentCode
    1696221
  • Title

    An IDDQ based built-in concurrent test technique for interconnects in a boundary scan environment

  • Author

    Su, Chauchin ; Hwang, Kychin ; Jou, Shyh-Jye

  • Author_Institution
    Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
  • fYear
    34608
  • Firstpage
    670
  • Lastpage
    676
  • Abstract
    An IDDQ based scheme has been presented for concurrent built-in self-test of MCM interconnects. The scheme detects interconnect faults while the system is on-line
  • Keywords
    boundary scan testing; built-in self test; electric current measurement; fault diagnosis; integrated circuit interconnections; logic testing; multichip modules; IDDQ built-in concurrent test; MCM interconnects; boundary scan environment; detection latency analysis; fault detection; interconnect faults; online; stuck-at fault; Automatic testing; Built-in self-test; Circuit testing; Connectors; Fixtures; Integrated circuit interconnections; Packaging; Pins; Registers; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1994. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-2103-0
  • Type

    conf

  • DOI
    10.1109/TEST.1994.528012
  • Filename
    528012
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1696221