DocumentCode :
1696510
Title :
Comprehensive design analysis of QFN and PowerQFN packages for enhanced board level solder joint reliability
Author :
Tee, Tong Yan ; Ng, Hun Shen ; Diot, Jean-Luc ; Frezza, Giovanni ; Tiziani, Roberto ; Santospirito, Giancarlo
Author_Institution :
STMicroelectronics, Singapore, Singapore
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
985
Lastpage :
991
Abstract :
Board level solder joint reliability is a critical issue for Quad Flat Non-lead Package (QFN), a type of leadframe CSP, during the thermal cycling test. However, currently there are very few papers available on fatigue modeling and thermal cycling test of QFN on board. In this paper, a parametric 3D FEA sliced model is built for QFN (4×4, 5×5, 6×6, 7×7, and 8×8) and PowerQFN-8×8 on board with considerations of detailed pad design, realistic shape of solder joint and solder fillet, and non-linear material properties. It has the capability to predict the fatigue life of solder joint during the thermal cycling test. The fatigue model applied is based on Darveaux´s approach with non-linear viscoplastic analysis of solder joints. The solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during the thermal cycling test. Higher SED leads to shorter fatigue life. For the test vehicles studied, the maximum SED is observed mostly at the top corner of peripheral solder joint.
Keywords :
chip scale packaging; fatigue; finite element analysis; modelling; printed circuits; reliability; soldering; viscoplasticity; PCB thickness; PowerQFN packages; QFN packages; board level solder joint reliability; characteristic life; design analysis; fatigue life prediction; fatigue modeling; leadframe CSP; modified Darveaux correlation constants; nonlinear material properties; nonlinear viscoplastic analysis; package parameters; pad design; parametric 3D FEA sliced model; quad flat nonlead package; solder fillet shape; solder joint damage model; solder joint reliability enhancement; solder joint shape; solder standoff; strain energy density; thermal cycling test; Capacitive sensors; Chip scale packaging; Fatigue; Lead; Life testing; Material properties; Predictive models; Shape; Soldering; Vehicles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
ISSN :
0569-5503
Print_ISBN :
0-7803-7430-4
Type :
conf
DOI :
10.1109/ECTC.2002.1008221
Filename :
1008221
Link To Document :
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