A 2/3 inch 400 k pixel sticking-free stack-CCD image sensor

Author

Sasaki, M. ; Koya, Y. ; Yamashita, H. ; Ohsawa, S. ; Miyagawa, R. ; Ihara, H. ; Sakuma, N. ; Nozaki, H. ; Matsunaga, Y. ; Furukawa, A. ; Honda, H. ; Manabe, S.

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1993

Firstpage

186

Lastpage

187

Abstract

A 2/3-in 400-k pixel-stack-CCD (charge coupled device) image sensor that has bias charge injection into the a-Si layer is described. Because the bias charges fill the deep level traps in advance, image sticking is reduced to imperceptible levels 0.3 s after 10000*standard incident light is turned off. This device has the frame interline transfer architecture; the V-CCD (vertical-CCD) registers are used not only as signal charge transfer paths in the vertical-blanking period, but also as blooming drains in the signal-charge-integration period. The equivalent circuit of the stack-CCD sensor is shown along with a cross-section view of the unit pixel in the stack-CCD sensor.<>

Keywords

CCD image sensors; deep levels; equivalent circuits; 0.67 in; 4*10/sup 5/ pixel; amorphous Si layer; bias charge injection; blooming drains; charge coupled device; deep level traps; equivalent circuit; frame interline transfer architecture; image sticking reduction; signal-charge-integration period; stack-CCD image sensor; sticking-free operation; vertical-blanking period; Clocks; Equivalent circuits; Image sensors; Pixel; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-0987-1

Type

conf

DOI

10.1109/ISSCC.1993.280004

Filename

280004