DocumentCode
1696768
Title
Programming with Functional Memory
Author
Jr., Richard Halverson, ; Lew, Art
Author_Institution
University of Hawaii at Manoa, USA
Volume
1
fYear
1994
Firstpage
85
Lastpage
92
Abstract
Functional memory (FM) uses memory mapped reprogrammable field programmable gate arrays (FPGAs) for fine-grained parallel processing. Multi-operand expressions are computed in combinational logic eliminating processor computation steps. FPGAs capture operands as memory is written, eliminating separate processor load-stores to pass operands. This paper describes how program expressions can be implemented in FM, including branch address computations. It concludes with a load store analysis comparing a conventional von Neumann processor with and without FM for a shortest path program. The load store count stays about the same but eliminating the computation steps results in a one-third step reduction overall with FM.
Keywords
Application software; Concurrent computing; Field programmable gate arrays; Functional programming; Hardware; Parallel processing; Parallel programming; Programmable logic arrays; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1994. Vol. 1. ICPP 1994. International Conference on
Conference_Location
North Carolina State University, NC, USA
ISSN
0190-3918
Print_ISBN
0-8493-2493-9
Type
conf
DOI
10.1109/ICPP.1994.170
Filename
4115698
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