Title :
A 640MHz CMOS Switched-Capacitor Sigma-Delta ADC with 12 Bits of Resolution by Using Double Sampling Technique
Author :
Torkzadeh, Pooya ; Javidan, Javad ; Atarodi, M.
Author_Institution :
EE Dept, Sharif Univ. of Technol., Tehran
Abstract :
In this paper, a novel architecture of sigma-delta (SigmaDelta) modulator for maximum achievable SNR amount, analytical aspects and its implementation by switched capacitor circuits using double sampling technique will be presented. The design of anti-aliasing filter has been integrated inside of modulator signal transfer function and it has been shown that the implemented 3rd order sigma-delta (SigmaDelta) modulator can be designed for the maximum SNR of 72dB for minimum over-sampling ratio of 32. Integrator non-idealities and interferer parameters effect on modulator stability and SNR have been explained elaborately. Designed modulator has been implemented by process of 0.18 um TSMC in ADS environment and SNR amount of 72 dB for signal band-width of 10 MHz corresponding to 12 bits of resolution has been achieved. Simulation results on implemented modulator validate the implemented ADC and its main parameters such as stability and input dynamic range.
Keywords :
CMOS integrated circuits; integrating circuits; sigma-delta modulation; switched capacitor networks; transfer functions; ADC; CMOS switched-capacitor circuit; anti-aliasing filter; double sampling technique; frequency 640 MHz; integrator; sigma-delta modulator; signal transfer function; Delta-sigma modulation; Dynamic range; Filters; Sampling methods; Signal design; Signal processing; Signal resolution; Stability; Switched capacitor circuits; Transfer functions;
Conference_Titel :
Circuits and Systems for Communications, 2008. ICCSC 2008. 4th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-1707-0
Electronic_ISBN :
978-1-4244-1708-7
DOI :
10.1109/ICCSC.2008.127
