Title :
Goal-directed vector generation using sample ICs
Author :
Raymond, Douglas ; Stringer, Philip ; Ng, Harold ; Mitsumata, Michael ; Burk, Robert
Author_Institution :
Teradyne Inc., USA
Abstract :
This paper describes a test-generation method that automatically creates efficient, high-quality vector sequences that catch ASIC pin faults at in-circuit board test. The method works with a sample IC. Simulation models are not required
Keywords :
application specific integrated circuits; digital simulation; fault diagnosis; integrated circuit testing; logic testing; minimisation; ASIC pin faults; high-quality vector sequences; in-circuit board test; minimisation; sample IC; test-generation; vector generation; Automatic programming; Automatic testing; Circuit faults; Circuit testing; Costs; Electrical fault detection; Fault detection; Integrated circuit modeling; Manufacturing; Printed circuits;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.528027
